University of South Florida

Department of Electrical Engineering

Senior Design Project Report:

“Design and Construction of a Superheterodyne Amplitude-Modulated Receiver”

by Charles P. Baylis II

Dr. Paris Wiley, Faculty Supervisor

Fall 2002

I. ABSTRACT

The device that was designed is a superheterodyne, fixed amplitude-modulated (AM) receiver. The receiver met its specifications to receive an AM signal that is broadcast at 970 kilohertz (kHz), down-convert it to an intermediate frequency of 455 kHz, and output an audio signal through a speaker. This two-stage down-conversion allows components with lower quality factors to be used in the circuit.

The signal enters the receiver at the antenna, and is fed into a radio-frequency (RF) amplifier, which has a gain of about 85 volts per volt (V/V) and a bandwidth of 43.4 kHz. This stage amplifies the signal and removes the image frequency, the frequency which would be down-converted to the same intermediate frequency as the signal being received. A local oscillator outputs about 3 volts (V) peak-to-peak at approximately 1425 kilohertz. This oscillator is mixed with the output of the RF Amplifier, providing a signal at the intermediate frequency (IF) of 455 kHz, the difference of the signal frequency and local oscillator frequency, to the IF amplifier. The IF amplifier gives a gain of over 100 and provides adjacent channel rejection with a bandwidth of 21.2 kHz. The signal is then demodulated, fed to an audio amplifier, and output from a 0.5 watt, 8 ohm speaker.

Both the RF and IF amplifiers use the cascode amplifier design; this design helps to prevent Miller-effect oscillations. The local oscillator is a common-base Colpitts oscillator and was tuned by the cut-and-try method after initial design to achieve as close to 3 V peak-to-peak, 1425 kHz as possible. Each amplifier and the mixer contain a tuned circuit to remove unwanted frequency components. The demodulator consists of a diode and a lowpass filter, and the audio amplifier is constructed from an LM386 power op-amp.

The cost for parts to produce superheterodyne AM receiver is estimated at $66.60, while the cost per unit for construction of one thousand units is estimated at $45.77. These costs could be reduced if the parts were soldered together instead of being placed on a breadboard.

The societal impact of the superheterodyne AM receiver is large, because it allows clear reception of high-frequency channels. The clarity of the superheterodyne receiver, originally introduced by Edwin Armstrong in the time of World War I, opened the door to the development of frequency modulation (FM) and allows the use of cellular phones, frequency modulation, and other high frequency applications. Radio communication today makes current information readily accessible to nearly everyone.

The receiver designed works properly, providing a clear, distinguishable output of a local 970 AM broadcast.

II. ACKNOWLEDGEMENTS

The writer would like to express deepest appreciation and gratitude to Dr. Paris Wiley, the faculty supervisor for this project, for his knowledgeable assistance with theory and design concepts in addition to fostering an understanding of non-ideal effects that appeared during measurements. Thanks is also given to Mr. Trung Nguyen and the departmental employees of the Electrical Engineering Electronics and Equipment Repair Shop, who were very helpful and accommodating in providing the necessary components to construct the hardware for this project.

III. INTRODUCTION

This senior design project consisted of the design and construction of a superheterodyne amplitude-modulated (AM) receiver. The purpose of the project was to receive an amplitude-modulated signal at 970 kilohertz (kHz) and output the audio waveform through a speaker device. Using a superheterodyne architecture, the signal was received with an antenna, amplified, down-converted to an intermediate frequency of approximately 455 kHz, amplified again, demodulated, amplified, and output through the speaker. The radio-frequency (RF) amplifier, local oscillator (LO), mixer, and intermediate frequency (IF) amplifier were simulated using PSPICE following design to test the feasibility of the design. The design specifications are given in the table of Figure 1 and a system block diagram is given in Figure 2. A photograph of the finished receiver is shown in Figure 3.

Design Specification	Met (Yes/No)
Signal Reception with Antenna	Yes
Down-Conversion to Intermediate Frequency of approximately 455 kHz (AM standard)	Yes
Audible Audio Output through Speaker	Yes

Figure 1. Table of Design Specifications.

Figure 2. System Block Diagram.

Figure 3. Photograph of the Finished Receiver.

Why down-convert in two stages? Why not simply convert the signal to baseband with an antenna, diode, and tuned circuit? A primary reason is that the quality factor of the circuits need not be as high in a homodyne (direct-down-conversion) receiver. In a superheterodyne receiver, adjacent channel rejection is performed in the IF amplifier, requiring the RF amplifier to reject only the image frequency and interference from the local oscillator. Because quality factor Q is given by the equation

Q = f_o / W (1)

where f_o is the center frequency of the amplifier and W is the 3-decibel (dB) bandwidth of the amplifier, trying to reject adjacent channels at the higher-frequency RF amplifier requires in a higher quality-factor circuit.[1]

Another reason for using a superheterodyne receiver is that the RF stage and local oscillator can be adjusted to be synchronously tunable, while the IF, demodulator, and audio amplifier stages can be fixed.[2] Keeping the tuning of adjacent channel rejection stage (the IF) constant helps to keep the gain (related to center frequency) and bandwidth of this stage consistent.

The concept of the superheterodyne receiver system is a fundamental concept of communications theory. Much of the challenge of this project lay in the actual design of the electronic circuits. The key to successful design was designing the electronics to avoid non-ideal occurrences that could degrade or eliminate the desired message signal. Transistor circuit operating points were designed to allow the message signal to receive maximum gain before saturation or cutoff occurred. The mixer operating point was designed to allow maximum signal swing. A knowledge of the principles of the bipolar junction transistor (BJT) and the junction field-effect transistor (JFET) were studied and applied to create a circuit with optimal response and as little degradation of the message as possible. Amplifiers were designed to avoid unwanted oscillations. Careful tuning and adjustment of the oscillator was also necessary; correct operation of the oscillator is a key to optimal system behavior.

Several sources were consulted during the design process. The book Solid State Radio Engineering, written by Herbert L. Krauss, Charles W. Bostian, and Fredrick H. Raab, contains much information that was used for design of the RF and IF amplifiers, local oscillator, mixer, and demodulator.[3] Microelectronic Circuits, by Adel S. Sedra and Kenneth C. Smith served as a reference relating to electronics calculations and properties of the BJT and JFET.[4] The third major source used for this project was Communication Systems, by A. Bruce Carlson, Paul B. Crilly, and Janet C. Rutledge.[5] This book was consulted for communications theory behind the superheterodyne receiver, and also provided the basic demodulator design and explanation. Many other various resources were consulted for necessary information pertaining to the design of the individual stages.

IV. THEORY / DISCUSSION OF SIMULATION AND DESIGN METHODS

The design approach used in this project was to design each component of the Figure 2 block diagram individually. Simulations and testing were also done by individual blocks in most cases. The first section following the antenna is the RF amplifier. The RF amplifier was designed with BJTs in a cascode configuration for a gain of 100 volts per volt (V/V), or 30 dB. A general cascode amplifier circuit is shown in Figure 4. This configuration consists of a common-emitter BJT followed by a common-base BJT.

The values for L₁ and C₃ can be found using the formula

f_o = 1 / 2π√(LC) (2)

where f_o is the resonant frequency. If the value of the inductor is known, the value for the capacitor can be calculated or vice versa.

The formula for common-emitter gain is given by

Av = g_mR_C / (1 + g_mR_E) (3)

where R_C is the total resistance between the collector and ground and R_E is the total resistance between the emitter and ground. For the common-emitter transistor in the cascode configuration, R_C is approximately equal to 1/g_m because the base of the common-base transistor is coupled to ground. R_E is zero because the emitter of the common-emitter transistor is coupled to ground. Thus the gain for the common-emitter circuit is approximately equal to 1. The formula for common-base gain is given by

Av = r_πg_mR_C / ( r_π + R_B) (4)

R_B is the total resistance between the base and ground. Because the base is coupled to ground, R_B is zero and the total gain of the cascode amplifier is equal to g_mR_C.

Figure 4. General Cascode Amplifier Circuit.

The purpose for designing the amplifier in the cascode configuration is the avoidance of oscillations that could occur if a single-transistor circuit was used. In a common-emitter circuit, internal transistor capacitance C_μ causes the circuit to suffer from the Miller effect.[6] C_μ can complete a Colpitts oscillator network with the tuned circuit at the output and unwanted oscillations can occur. The cascode configuration lessens the probability of oscillation by the use of a common-base network, which does not experience the Miller effect, as the output stage.

To design for a gain, R_c must be known so that g_m can be calculated. R_c is the output resistance of the transistor r_o in parallel with the parallel equivalent resistance R_p of the inductor having quality factor Q at the resonant frequency f_o, given by

R_p = 2πQf_oL (5)

The quality factor was measured by placing the tuned circuit at the collector of a common-emitter network with a tuned circuit at the collector (output). The frequency of the input signal was varied until the output wave was at maximum amplitude and using the assumption that transistor open-loop gain β is large, the signal current through the collector was equated to the signal current through the emitter:

v_e / R_E = v_c / R_C (6)

v_e and v_c, the signal amplitudes at the collector and emitter, were measured. Since R_E was known, R_C could be found by

R_C = v_c R_E / v_e (7)

Equation (5) was then used to find the quality factor. Because R_C was known, to get a certain gain, g_m should be calculated and forced in the circuit. Because

g_m = 40I_C (7)

it was found that by choosing a collector current, the gain could be imposed. Assuming β is large for both transistors, this current was forced by using a voltage divider network with R₁, R₂, and R₃, giving a voltage at the emitter of the common-emitter transistor and choosing R_E such that the current is equal to one-fortieth of the desired value for g_m. The exact values of R₁, R₂, and R₃ were determined by choosing a desired current through this network.

For the local oscillator, a common-base Colpitts network was used. A general common-base Colpitts oscillator is shown in Figure 5. A feedback network is connected between the collector and emitter of the BJT. The capacitors are used in voltage-divider format to divide the output of oscillation at the collector to about 3 Volts peak-to-peak, the optimum level for the mixer input. The mixer load can be measured once the operating point has been chosen for the mixer but can be assumed to be fairly small, probably between 200 and 500 ohms. A loop gain of 2 to 3 is needed for steady oscillations and should be achieved. Ideally, a peak-to-peak voltage of 2Vcc should be developed at the collector. Because Vcc was 15 Volts (V) for this project, approximately 30 Volts was expected during optimal oscillation. However, the actual value for oscillation at the collector was 21 to 24 V peak-to-peak, due to the fact that some of the voltage was lost due to R_E and R_emitter, a resistor used to maintain a sinusoidal waveform.

The frequency of oscillation is given by

f_LO = f_RF + f_IF (9)

Given the inductor value, the total equivalent capacitance C_eq can be found from equation (2). To find C₁ and C₂, two equations can be used. Assuming 21 V peak-to-peak at the collector and desiring three volts across C₂ gives, from voltage division,

21C₁ / (C₁ + C₂) = 3 (10)

The capacitors are considered as being in series for purposes of the tuned circuit, so

C₁C₂ / (C₁ + C₂) = C_eq (11)

These two equations were used to determine the capacitor values. Despite calculation, however, the tolerances in the capacitors and the low load of the mixer required exact tuning of the circuit to be performed at construction. R_emitter, C₁, and C₂ were adjusted to provide optimal output.

Figure 5. General Common Base Colpitts Oscillator Circuit.

Mixing is based upon the mathematical principle of the multiplication of two sinusoidal waves. Let f(t) = cos ω₁t and g(t) = cos ω₂t. Then the product f(t)g(t) is given by

f(t)g(t) = cos ω₁t cos ω₂t

= ½ cos (ω₁ + ω₂)t + ½ cos (ω₁ - ω₂)t (12)

This shows that multiplication of two sinusoidal waveforms gives a wave containing the sum and the difference frequencies. Thus, a nonlinear device which produces the product of two waveforms (the RF amplifier and local oscillator outputs) can be used as a mixer.

A JFET was used in the mixer circuit, a general version of which is shown in Figure 6. The signal from the local oscillator is represented by source V₁ and the signal from the RF amplifier is represented by V₂. The operating point can be set by choosing the source resistor R_S. The equation governing the relationship between the drain current I_D and the gate-source voltage V_GS is given by

I_D = I_DSS ( 1 – V_GS /V_P )² (13)

This equation is nonlinear and thus produces the product of the two waves, giving components with the sum and difference frequencies. A tuned circuit can be used to dampen the undesired components, leaving the difference frequency, the intermediate frequency, as the output. This equation and the obvious fact that

I_D = -V_GS / R_S (14)

give two equations in two unknowns. I_DSS and V_GS are properties of the transistor and were measured before R_S was chosen.

Figure 6. General Mixer Circuit.

Because R₁ is not connected to Vcc, the bias voltage at the source is zero regardless of the choice of R₁. This can be chosen to be large to present a large load resistance to the RF amplifier circuit. From equation (13), it can be seen that I_DSS is the current when the gate-source voltage is zero. Thus the source and gate can be grounded and power applied to the drain. The current through the source is I_DSS. A negative voltage source can then be applied to the gate. Beginning at zero volts, this source can be set continually more negative until no current flows through the source. The negative voltage at which source current is zero is the pinch-off voltage V_P from equation (13).

The current-voltage characteristic of the JFET is an increasing exponential curve with an equation given by equation (13) between voltage values of V_P and zero. Thus, a good point to bias the JFET for maximum signal swing is the point at which V_GS = ½ V_P. Placing this number into equation (13) gives the corresponding value for I_D. Because the voltage at the gate is zero, the resistance of the source R_S to secure this operating point is given by

R_S = -V_GS / I_D (15)

This completes the circuit design of the mixer. The conversion gain of the mixer is given by the following equation:

Conversion Gain = Output Voltage at f_IF / Input Voltage at f_RF (16)

The conversion gain is limited by the quality factor of the tuned circuit at the drain of the JFET.

A cascode network was used for the design of the IF amplifier first stage. The value of the parallel equivalent resistance of the inductor at the intermediate frequency was measured at the intermediate frequency in an experiment similar to that for the inductor used in the RF amplifier. The amplifier design methods were very similar to those used for the RF amplifier. Like the RF amplifier, the IF amplifier was designed to give approximately 30 dB of gain (100 V/V).

The IF amplifier second stage was a common-collector emitter follower, designed to buffer the IF amplifier from the lower input resistance of the demodulator. The circuit was designed to achieve a gain close to the maximum common-collector gain of 1 and to present a large load resistance to the IF amplifier.

The demodulator is used to take its input signal, amplitude modulated at the intermediate frequency, and demodulate it, passing only the envelope, which is the audio signal, to the audio amplifier. This circuit is simply a diode followed by a lowpass filter. An AM signal with message x(t) is given by the equation

X_c(t) = A_c[1 + μx(t)] cos ω_ct (17)[7]

where A_c is the carrier wave amplitude, μ is the modulating index, and ω_c is the angular frequency of the carrier wave. Thus the modulating signal “rides” on the positive and negative sides of the carrier wave.

A general demodulator circuit is shown in Figure 7. The diode is used to provide nonlinearity, which results in several frequency components, including a component at baseband. A low pass filter follows the diode, removing all components except the baseband component, which is the message. The coupling capacitor allows the message to pass to the audio amplifier. A coupling capacitor blocks the DC component of the signal, de-biasing the message. The signal is then sent to the audio amplifier. The pole of the low pass filter was placed at 20 kHz to allow all audible frequency components to pass. A capacitor can be chosen and the resistor can be calculated using the following equation:

f_p = 1 / 2πR_ThC (18)

where f_p is the pole frequency and R_Th is the Thevenin equivalent resistance seen at the terminals of the capacitor.

Figure 7. General Demodulator Circuit.

The audio amplifier used for this circuit was based upon a LM386 operational amplifier. This op-amp is designed to be operated on a lower power supply and only has one power input of approximately four to eight volts. The op-amp has a maximum gain of 20 V/V but can achieve higher gains if a coupling capacitor is connected between pins one and eight. However, a gain of 20 V/V was used with the configuration shown in Figure 8. The output of the op-amp is biased at half of the power-supply voltage, so a large coupling capacitor must be placed at the output to avoid forcing the op-amp to produce a large amount of current to produce the DC component of the output voltage across the small load of the speaker. A potentiometer controls the input to the non-inverting op-amp and can be used as a volume control.

Figure 8. Audio Amplifier with LM386 Op-Amp.

Simulations were performed on PSPICE for the RF amplifier, the local oscillator, the mixer, and the IF amplifier. For the RF amplifier, the designer is interested in finding the center frequency, the center-frequency gain, and the 3-dB points. Therefore, an AC analysis was used, showing the output on a linear scale and using cursors to measure points of interest.

For the local oscillator, the main features that needed to be seen in the simulation were the frequency and peak-to-peak voltage of the waveform. It was also desired to obtain a pure sine wave through adjusting the resistance between the feedback-loop return point and the transistor emitter. Thus it was necessary to perform a Transient Analysis on PSPICE, adjusting the time scale to view the sine wave clearly.

The main characteristics that needed to be obtained from the mixer simulation were the frequency content of the output and the voltage level of the intermediate-frequency output component relative to the RF input. Finding these characteristics allows the simulated conversion gain to be computed. A Transient Analysis was used, allowing the output waveform to be seen in the time domain, and with use of the Fast Fourier Transform feature, the frequency-domain output was also viewed.

The IF amplifier simulation was performed by taking an AC Analysis in a manner similar to the RF amplifier simulation.

V. DESCRIPTION OF DESIGN

The RF amplifier, complete with design values is shown in Figure 9. The RF amplifier was designed for a gain of 100. Using equation (2) and choosing a 100 microhenry inductor, the necessary capacitance for a resonant frequency of 970 kHz was found to be approximately 270 picofarads (pF). The measured resonant frequency for this tuned circuit was approximately 1013.5 kHz, so a capacitance of 297 pF was used for the quality factor measurement. Using the process described in the above section, the parallel equivalent resistance of the tuned circuit resulted in a parallel equivalent resistance of 14,457.14 ohms and a quality factor of 23.918.

It was decided that the design would aim for 3 volts at the emitter of Q₂, 5 volts at the emitter of Q₁, and a current of 1 mA through the voltage divider network that is connected to the transistor bases. Assuming a base-emitter voltage of 0.6 for the transistors, values of R₁ = 9.4 kilo-ohms, R₂ = 2 kilo-ohms, and R₃ = 3.6 kilo-ohms were obtained.

Figure 9. RF Amplifier Circuit With Design Values.

The voltage gain, equal to g_mR_C = 40I_CR_C, was set equal to 100 and R_C was set equal to the parallel equivalent resistance of the tuned circuit. Because the output resistance r_o of the transistor was not taken into account, the actual gain was lower than designed. The value necessary for I_C was found to be 0.1729 milliamperes (mA). This condition was forced upon the circuit by choosing the emitter resistor of Q₂ to be equal to 3/ 0.0001729 because the voltage at this point is 3 volts due to the voltage divider network. The value obtained for the emitter resistance was 17,351 ohms.

The designed local oscillator is shown in Figure 10. Using equation (9) and the knowledge that the frequency of the desired RF signal is 970 kHz and the intermediate frequency, as a standard, is 455 kHz for AM broadcast, gives the frequency of the local oscillator as

f_LO = f_RF + f_IF (9)

f_LO = 970 kHz + 455 kHz = 1425 kHz

Using 1425 kHz as the resonant frequency and choosing an inductor of 100 microhenries, the equivalent capacitance was calculated from equation (2) to be 124.7 pF. Also, a voltage of 21 V peak-to-peak was assumed to be existent at the collector and 3 V peak-to-peak was desired at the oscillator output. Using equations (10) and (11), two expressions in two unknowns were obtained:

124.7 pF = C₁C₂ / (C₁ + C₂)

3 = 21C₁ / (C₁ + C₂)

Solving these equations simultaneously, it was found that C₁ = 145.53 pF and C₂ = 873.18 pF. The value of R_E was chosen based on the premise that approximately four times the power necessary to be delivered to the mixer load (4 times the output voltage divided by the mixer resistance squared) should be input to the circuit from the power supply (measured by Vcc times the collector current. However, this resistance was calculated for a previous local oscillator design but was not altered when the design was changed. The local oscillator was found to still work satisfactorily and this change was not necessary.

Figure 10. Local Oscillator Circuit With Design Values.

The value for R_emitter was determined by adjusting a potentiometer to obtain a sinusoidal waveform at approximately 3 V peak-to-peak at the output. This potentiometer was adjusted on a cut-and-try basis. After the waveform was determined to be satisfactory, the value of the potentiometer was measured and a resistor replaced the potentiometer in the circuit.

The mixer circuit with design values is shown in Figure 11. A 3819 JFET was chosen for this mixer. The output from the RF amplifier was injected into the gate, while the local oscillator output was injected into the source. A large resistance of 1 mega-ohm was used for the gate resistance to provide a large load resistance to the RF amplifier. The resistance R_p was placed in the schematic to represent the equivalent parallel resistance of the inductor at 455 kHz. An inductor valued at approximately 100 microhenries was chosen, and a capacitance of 1187.901 pF was calculated using equation 2 to complete the 455 kHz tuned circuit. This tuned circuit is present in an attempt to dampen other frequency components so that the IF component is the strongest at the input of the IF amplifier, which is connected to the output of the mixer.

Figure 11. Mixer Circuit with Design Values.

To begin the operating-point design, the characteristics of the 3819 JFET were measured. Using the techniques outlined in the previous section, it was found that I_DSS = 6.110 mA and V_P = 3.07 V. To set the operating point at V_GS = ½ V_P, it was found from the mixer characteristic equation of equation (13) that the drain current I_D = 1.5275 mA. To achive this drain current, the source resistor R_S was chosen using equation (15) to be 1004.910 ohms, or approximately 1 kilo-ohm. It is important to note that the mere choice of this resistor determines the operating point.

The IF Amplifier with design values is shown in Figure 12. Like the RF Amplifier, the IF Amplifier was designed for a gain of 100. The first stage was designed for 3 V at the emitter of the Q₂, 5 V at the emitter of Q₁, and 1 mA through the voltage divider network at the transistor bases. Unlike the RF Amplifier, the output resistance r_o of the transistor was measured with the curve tracer as 18,500 ohms and taken into account in the design by setting the collector resistance equal to the equivalent inductor resistance in parallel with r_o. The measured results, as expected, were more accurate.

Figure 12. IF Amplifier Circuit With Design Values.

Using R_C = 6510.42 || 18,500 = 4815.70, because the gain is equal to g_mR_C, the necessary collector current was found to be 0.5191 mA. Because 3 V exists at the emitter of Q₁ and assuming that β is large, the necessary value for R_E was found to be 5678.59 ohms.

For the emitter follower used as the second stage, the DC voltage divider network of R₆ and R₇ was designed to conduct a current of approximately 0.01 mA. This allows the load resistance of the first stage to appear large regardless of the actual load resistance presented by the demodulator. As stated in the above section, the highest possible gain of the common collector circuit is one. This occurs when the value for AC emitter resistance is large. R_E was chosen as 10 kilo-ohms so that it would not substantially lower the value of emitter resistance when a small load resistance is attached.

The demodulator circuit with design values is shown in Figure 13. The low pass filter consisting of C₁ and R₁ was designed for a pole frequency of 20 kHz. A 1 microfarad capacitor was used for the coupling capacitor C₂. A is a coupling capacitor to prevent A capacitor value of 1 nanofarad (nF) was chosen and the Thevenin resistance value seen by this capacitor was calculated using equation (18). A Thevenin resistance value of 7957.74 ohms was calculated. The Thevenin resistance seen by C₁ is simply R₁||R₂. R₂ was used as 100 kilo-ohms at the time the calculation was made; however, a value of about 2 to 3 kilo-ohms would have been more appropriate. However, at this time, it was not known that the volume control potentiometer would be placed at this location and that a lower load value would be sufficient for correct operation. The use of 100 kilo-ohms for R₂ gave R₁ = 8645.75 ohms.

Figure 13. Demodulator Circuit With Design Values.

The audio amplifier was designed just as shown in Figure 8, with R_speaker = 8 ohms. A gain of 20 in the op-amp was found to be sufficient to drive the 8 ohm, 0.5 watt speaker, as the power through the speaker is given by the following formula:

P = V² / R_speaker

0.5 = V² / 8

V = 2 V rms

An RMS voltage of 2 V gives a necessary signal peak-to-peak voltage of 5.66 V to run the speaker at rated load. The amplifier was powered by 6 volts, a theoretically sufficient voltage to avoid cutting off the signal. A 5 kilo-ohm potentiometer was used for the variable R_pot, varying the input signal level and thus serving as a volume control. Because the 3819 op-amp automatically biases the output signal at half of the supply voltage, a 470 microfarad capacitor was connected between the op-amp and the speaker to prevent the speaker from drawing DC current. Without this capacitor, the voltage supply had to be lower because of the large current used, causing the signal to distort.

A complete schematic of the AM superheterodyne receiver design is given as Appendix A at the conclusion of this report. The values shown in the schematic are the actual values used for the parts and may differ slightly from the parts shown in the above graphs. For example, capacitance values were often changed at the testing to improve tuning.

The antenna used for this experiment was an approximately 15 foot strand of 10 AWG machine tool wire. This wire was stretched out and attached to the input to the circuit. A quarter-wave antenna, though optimal, is not practical for an AM receiver; its length would be approximately 300 feet. A tuned circuit tuned to 970 kHz was placed at the input of the system to remove stray interference such as local oscillator interference.

VI. MEASURED AND SIMULATED RESULTS

Measurements were taken on each individual system as it was constructed. Finally, the system was integrated and measurements were taken simply to check proper operation. For the RF amplifier, measurements of center frequency, center frequency gain, and 3-dB attenuation points were taken. From these measurements, it was possible to compute the bandwidth and the quality factor of the amplifier. Key measurements and their discrepancies with simulated values are shown in the table of Figure 14. A probable reason for the discrepancy in center-frequency gain is that the output resistance r_o of the transistor was not taken into account when designing for a gain of 100. Consequently, both the measured and simulated gains were lower than 100. A possible reason for the difference is that the parameters for the Q2N3904 transistor in PSPICE may not have been identical to those of the transistor used in the circuit. The quality factor and center-frequency gain measurements were reasonably close to simulation results. A PSPICE graph from the AC analysis is included in Appendix B.

Category	Simulated	Measured	Percent Discrepancy
Center Frequency (kHz)	964.045	974.3	1.064%
Center Freq. Gain (V/V)	91.997	87.188	-5.227%
Bandwidth (kHz)	41.573	43.4	4.395%
Quality Factor	23.189	22.45	-3.187%

Figure 14. Measured and Simulated RF Amplifier Results.

For the local oscillator, the parameters of interest are the frequency of oscillation and the peak-to-peak voltage of the output waveform. A comparison of simulated and measured values for the local oscillator is given in the table of Figure 15. A probable reason for discrepancies is that the measurements were taken from a circuit that had been improved during the testing the process to account for non-ideal factors. This was a necessary step because proper operation of the local oscillator is critical to obtaining a properly functioning device.

Category	Simulated	Measured	Percent Discrepancy
Freq.of Oscillation (kHz)	1375.516	1423	3.45%
Output Voltage (V p-p)	3.251	3.060	-5.88%

Figure 15. Measured and Simulated Local Oscillator Results.

Mixer results were measured by inputting the local oscillator at the local oscillator input and inputting 1.250 V peak from the function generator to the RF input. The mixer circuit for simulation is shown in Figure 11 and a comparison of mixer measurements with simulation results is shown in Figure 15. Discrepancies may be due to the fact that the measurement techniques are difficult for the mixer output, due to the fluctuations of the signal from the mixing of different frequency components.

Category	Simulated	Measured	Percent Discrepancy
Conversion Gain (V/V)	0.827	0.704	-17.4%
Center Frequency (kHz)	469.799	461.1	-1.892%

Figure 16. Measured and Simulated Mixer Results.

The parameters of interest for the IF amplifier (Figure 12) are the same as for the RF amplifier. A comparison of results is given in Figure 17. All percent discrepancies are fairly small. Unlike the RF Amplifier, transistor output resistance r_o was taken into account in the design procedure. As a result, the simulated and measured gains were higher for the IF amplifier.

Category	Simulated	Measured	Percent Discrepancy
Center Frequency (kHz)	454.546	459.7	1.134%
Center Freq. Gain (V/V)	106.108	109.36	3.065%
Bandwidth (kHz)	21.718	21.2	-2.385%
Quality Factor	20.929	21.88	4.544%

Figure 17. Measured and Simulated IF Amplfier Results.

Figure 18. RF Amplifier Output.

Following design of these four major components and the demodulator, the system was integrated and tested. After the audio amplifier was added and a working system was achieved, measurements were taken of signal levels and frequencies throughout the circuit. For the RF Amplifier, the output peak-to-peak voltage was measured as 1.05 V. A picture of the 970 kHz amplitude-modulated signal at the output of the RF amplifier as seen on the oscilloscope is shown in Figure 18.

During system operation, the local oscillator output was measured at 3.064 Volts peak-to-peak at approximately 1430 kHz. The local oscillator output as measured by the oscilloscope during complete system operation is shown in Figure 19.

Figure 19. Local Oscillator Output.

The mixer was seen to produce an output of 692 millivolts (mV) during system operation, yielding a conversion gain of 0.659 (-3.622 dB). The mixer output is a combination of several frequency components. The most prominent are the 455 kHz difference component and the 1425 kHz local oscillator feedthrough component. The mixer output is shown in Figure 20.

Figure 20. Mixer Output.

The IF amplifier output is shown in Figure 21 and demonstrates that most of the other frequency components have been removed by filtering, leaving the 455 kHz component as the predominant component. The frequency of the output was measured to be 467 kHz, with a peak-to-peak voltage of 7.32 Volts.

Figure 21. IF Amplifier Output.

The output wave of the demodulator is shown in Figure 22. The 455 kHz carrier has been removed, leaving only the message envelope. This message was found to have a peak-to-peak voltage of 4.80 Volts. The output of this was fed to the audio amplifier, whose output (to the speaker) is shown in Figure 23. Notice that amplification occurs between the demodulator output and the audio amplifier output. Some saturation is also observed in the audio amplifier output, however, the signal is still easily intelligible and a pattern can be readily observed in the graph.

Figure 22. Demodulator Output.

Figure 23. Audio Amplifier Output to the Speaker.

VII. COST ANALYSIS

A key component in the design of a system is the cost of production. A cost analysis has been performed on the AM superheterodyne receiver to determine the cost of producing one unit and the cost of producing one thousand units. A table given in Figure 24 shows the quantities of the different components used in the construction of the device and the costs per unit and any special bulk quantity costs that may exist.

Part Type	Cost	No. per Unit	Bulk Rate (if applicable)	Cost for One Unit	Cost for 1000 Units
Resistor	$4.99/50, $5.99/100	29	$11.99/500	$4.99	$695.42
1 uF Coupling Capacitor	$7.92/10	19	$396/1000	$15.84	$7524.00
470 uF Electrolytic Capacitor	$0.69	1	$173/1000	$0.69	$173.00
Other Capacitor (Assorted Values)	$3.99/100	14		$3.99